Working with Templates
SVEditor provides the template facility to enable files -- often specific to a verification methodology -- to be quickly parameterized and generated by the user.
SVEditor provides built-in templates for common constructs specific to verification methodologies, such as a UVM Agent. Users can easily create new templates that are specific to their design and verification environments.
Instantiating Existing Templates
Existing templates are instantiated using the New SystemVerilog Template wizard. Open the wizard by selecting the project or folder in which template files should be created, then select New->SystemVerilog Template from the context menu, as shown below.
Selecting the Template
Locate the desired template in the Available Templates list, as shown below. Then select Next.
Specifying the Template Name
All template instances require a name to be specified. Usually, this name is used to specialize the name of files created by the template. Specify the template name, as shown below. Here, we are creating a UVM Agent where all file and class names are prefixed with simple.
Note that the wizard confirms that the files to be created will not overwrite existing files in the output folder. Select Overwrite Files if you wish to overwrite existing files.
Finally, select Next.
Specifying Template Parameters
Some templates have additional parameters. These parameters are configured on the Template Parameters wizard page.
After configuring the parameters, select Finish.
Setting the Template Path
SVEditor discovers user-defined templates via the template path. To configure the template path, open the preference dialog (Window->Preferences). Select the SVEditor->SV Template Paths entry, as shown below
Creating a New Template
A template is composed of a template descriptor and template source files.
Creating an SV Template Descriptor File
An SV Template descriptor (.svt file) is created via a wizard. Since many users will not create their own templates, the SVT wizard is not available via a shortcut.
Select the project or folder in which you wish to create the template descriptor. Select New->Other... from the content menu, as shown below. Select Next.
Expand the SVEditor category and select SystemVerilog Template Descriptor, as shown below. Select Next.
Finally, specify the name of the template-descriptor file as shown below. Select Finish.
The template descriptor editor will open, as shown below.